퀄리타스반도체는 널리 사용되는 CSI와 DSI 인터페이스 사양을 포함하여 모바일, IoT 및 자동차 산업을 위한 다양한 MIPI IP 솔루션을 제공합니다. MIPI (Mobile Industry Processor Interface) 규격은 모뎀, AP, 카메라, 디스플레이, 오디오, 스토리지, 안테나, 튜너 등 모바일 기기에 탑재되는 모든 반도체 부품간의 초고속 인터커넥트를 대상으로 하며, 오늘날 거의 모든 모바일 기기 뿐만 아니라 인공지능이나 자율주행같은 다양한 응용분야로 확산되고 있습니다.
퀄리타스반도체는 28nm CMOS를 비롯한 8nm, 5nm, 4nm공정의 D/C-PHY Combo PHY IP등 다양한 FinFET 반도체 공정에서 MIPI IP를 제공하고 있습니다.
MIPI D-PHY
Request DatasheetQualitas' MIPI D-PHY IP is a hard-macro PHY for CSI RX and DSI TX. IO pads and EDS structures are included. In addition, extensive built-in self-test features, such as loopback and scan, are supported. It offers a cost-effective and low-power solution.
Features
Tech Specs
Foundry Node | 28 nm | 14 nm | 8 nm | 5 nm | 4 nm |
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Standard | Under NDA | ||||
Max. datarate | |||||
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MIPI C-PHY
Request DatasheetThe MIPI C-PHY IP is a hard-macro PHY for CSI RX. IO pads and ESD structures are included. In addition, extensive built-in self-test features, such as loopback and scan, are supported. It offers a cost-effective and low power solution.
Features
Tech Specs
Foundry Node | 28 nm | 14 nm | 8 nm | 5 nm | 4 nm |
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Standard | Under NDA | ||||
Max. datarate | |||||
Status |
MIPI D-PHY/C-PHY Combo
Request DatasheetQualitas' MIPI D-PHY/C-PHY Combo IP is a hard-macro PHY for CSI RX or DSI TX. IO pads and ESD structures are included. In addition, extensive built-in self-test features, such as loopback and scan, are supported. It offers a cost-effective and low-power solution.
Features
Tech Specs
Foundry Node | 14 nm | 8 nm | 5 nm | 4 nm | |
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Standard | Under NDA | ||||
Max. datarate (D-PHY) |
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Max. datarate (C-PHY) |
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CSI-2 RX Controller
Request DatasheetThe Qualitas CSI-2 RX controller IP is optimized for low power, small size and high-speed interfaces, supporting a wide range of higher image resolutions. The CSI-2 RX Controller IP is fully compliant with the CSI-2 v1.2 specification and supports the DPHY v2.0 and CPHY v1.2.
Features
DSI TX/RX Controller
Request DatasheetThe Qualitas DSI TX/RX controller IP is optimized for low power, small size and high-speed interfaces between an application processor and display modules using either MIPI CPHY or MIPI DPHY. The DSI TX/RX Controller IP is fully compliant with the DSI v1.3 specification and supports the DPHY
Features