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SERDES

100G SERDES PHY

To overcome the limitations of operating speeds and bandwidth, Qualitas Semiconductor is developing the latest SERDES PHY design technology. The 100G SERDES PHY IP provides essential functionalities required in various high-speed interconnect standards. Among data transmission encoding methods, the demand for PAM4 (Pulse Amplitude Modulation with 4 levels) is rising compared to NRZ (Non-Return to Zero), and Qualitas Semiconductor is also increasing the data transfer speed by implementing PAM4 through Ethernet and PCIe.​

Qualitas Semiconductor develops analog CDR methods and DSP 100G SERDES PHY IP, providing optimized solutions depending on the client's needs. With the integration of next-generation technologies, Qualitas Semiconductor aims to expand its business further in the field of high-speed interconnects.

100G PAM4 SERDES PHY

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Qualitas' 100G SERDES PHY IP for VSR supports up to 100 Gbps data rate with low-power consumption and a small footprint. It has advanced features such as equalization, and clock and data recovery, ensuring reliable data transmission. The IP can be integrated into a variety of applications such as networking, data centers, and high-performance computing.

Features

  • Up to 12 dB of insertion loss
  • Common (CMN) and 1, 2 or 4 Data Lanes
  • Supports 100 and 50G PAM4 and 50 and 25G NRZ
  • RX CTLE/VGA and TX FIR Filters for Channel Equalization

Tech Specs

Foundry Node 14 nm
Standard Under NDA
Max. datarate
Status